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ID Category [?] Severity [?] Reproducibility Date Submitted Last Update
06624 Misc. Critical (emulation) Have not tried Jul 11, 2017, 10:11 Jul 14, 2017, 18:14
Tester MrGW View Status Public Platform MAME (Self-compiled)
Assigned To AJR Resolution Fixed OS Windows Vista/7/8 (64-bit)
Status [?] Resolved Driver mc10.cpp
Version 0.187 Fixed in Version 0.188 Build 64-bit
Summary MESS-specific 06624: Emulation of the right-shift and rotate instructions (ASR, LSR, ROR) do not correctly modify the overflow flag (V)
Description It seems the 6801/3 core in MAME instead emulates the behavior of a 6809, which leaves the overflow flag unchanged for those instructions.

A type-checking routine in the MicroColor Basic ROM of the MC-10 uses overflow flag logic to differentiate between string and numeric types. If you enter the Basic statement A$=100 on real hardware it results in a ?TM ERROR, as it should. When the same statement is entered under MAME emulation the code fails to detect the type conflict.

Jim Gerrie discovered the issue and Darren Atkinson provided additional analysis and the summary of the problem. I am submitting this bug on behalf of them.

Thank you!
Steps To Reproduce If you enter the Basic statement A$=100 on real hardware it results in a ?TM ERROR, as it should. When the same statement is entered under MAME emulation the code fails to detect the type conflict.
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User avatar
No.13973
Nathan Woods
Developer
Jul 11, 2017, 12:19
I've submitted a fix on a branch (https://github.com/npwoods/mame/tree/fix_mc6803_ror_lsr_asr_overflow)

I've done a quick change to 6800ops.hxx that seems to fix the problem. That said, this is a change that simply takes the report at its word, and I've made no attempt to validate the veracity of the report. Furthermore, this code affects a number of CPU cores in MAME (mc6800, m6801 etc). Before this gets merged (or even before I am willing to submit a PR), someone needs to do their homework to determine if this is a correct fix.
User avatar
No.13976
AJR
Developer
Jul 14, 2017, 16:39
Condition Code Register Note 6 on page 4-67 of the Motorola Microprocessors Data Manual (1981) provides an authoritative description of how MC6800 shift/rotate instructions affect the overflow flag. It notes that, for all ROL, ROR, ASL, ASR and LSR instructions, the V flag is "set equal to result of N ⊕ C after shift has occurred." (In case the logical symbol doesn't reproduce properly, it stands for Bitwise Exclusive OR. The N flag is always reset by LSR.)

This is probably also valid behavior for MC6801, MC6803, MC6802 and MC6808, though the MC6802/MC6808 datasheet seems to omit Note 6 itself and the MC6801/MC6803 datasheet merely indicates that these instructions do affect the overflow flag.