Soft reset [:exp1:cz6bs1:scsi:2:harddisk] T10SBC :exp1:cz6bs1:scsi:2:harddisk: no HD found! [:exp1:cz6bs1:scsi:3:harddisk] T10SBC :exp1:cz6bs1:scsi:3:harddisk: no HD found! [:exp1:cz6bs1:scsi:4:harddisk] T10SBC :exp1:cz6bs1:scsi:4:harddisk: no HD found! [:exp1:cz6bs1:scsi:5:harddisk] T10SBC :exp1:cz6bs1:scsi:5:harddisk: no HD found! [:exp1:cz6bs1:scsi:6:harddisk] T10SBC :exp1:cz6bs1:scsi:6:harddisk: no HD found! [:exp1:cz6bs1:scsi:7:harddisk] T10SBC :exp1:cz6bs1:scsi:7:harddisk: no HD found! [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] visarea larger then reg[20]: 992x551, 0x0 [:crtc] CRTC: Register 20 = 0316 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] CRTC: Register 20 = 0b16 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:keyboard:x68k] KB: LED status set to 7f [:keyboard:x68k] KB: LED status set to 7f [:keyboard:x68k] KB: Keyboard enable bit = 1 [:keyboard:x68k] KB: Keypress delay time is now 500ms [:keyboard:x68k] KB: Keypress repeat rate is now 30ms [:maincpu] ':maincpu' (FF8190): unmapped program memory write to E8C002 = 0101 & 00FF [:keyboard:x68k] KB: LED status set to 6f [:x68k_hdc] SASI: SPECIFY [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x303 [:x68k_hdc] SPECIFY: wrote 0x202 [:x68k_hdc] SPECIFY: wrote 0x9898 [:x68k_hdc] SPECIFY: wrote 0x8080 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SASI: Write transfer complete [:x68k_hdc] SASI: No HD connected [:x68k_hdc] SASI: REQUEST SENSE [:x68k_hdc] REQUEST SENSE: read value 0x01 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] SASI: Read transfer complete [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] CRTC: Register 20 = 0316 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:crtc] CRTC: Register 20 = 0b16 [:crtc] visarea larger then reg[20]: 992x551, 768x512 [:maincpu] ':maincpu' (FF8190): unmapped program memory write to E8C002 = 0101 & 00FF [:maincpu] ':maincpu' (FF8190): unmapped program memory write to E8C002 = 0101 & 00FF [:x68k_hdc] SASI: SPECIFY [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x303 [:x68k_hdc] SPECIFY: wrote 0x202 [:x68k_hdc] SPECIFY: wrote 0x9898 [:x68k_hdc] SPECIFY: wrote 0x8080 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SASI: Write transfer complete [:x68k_hdc] SASI: No HD connected [:x68k_hdc] SASI: REQUEST SENSE [:x68k_hdc] REQUEST SENSE: read value 0x01 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] SASI: Read transfer complete [:x68k_hdc] SASI: REZERO UNIT [:x68k_hdc] SASI: SPECIFY [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x303 [:x68k_hdc] SPECIFY: wrote 0x202 [:x68k_hdc] SPECIFY: wrote 0x9898 [:x68k_hdc] SPECIFY: wrote 0x8080 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SASI: Write transfer complete [:x68k_hdc] SASI: No HD connected [:x68k_hdc] SASI: REQUEST SENSE [:x68k_hdc] REQUEST SENSE: read value 0x01 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] SASI: Read transfer complete [:x68k_hdc] SASI: No HD connected [:x68k_hdc] SASI: REQUEST SENSE [:x68k_hdc] REQUEST SENSE: read value 0x01 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] SASI: Read transfer complete [:x68k_hdc] SASI: SPECIFY [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x101 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x303 [:x68k_hdc] SPECIFY: wrote 0x202 [:x68k_hdc] SPECIFY: wrote 0x9898 [:x68k_hdc] SPECIFY: wrote 0x8080 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SPECIFY: wrote 0x00 [:x68k_hdc] SASI: Write transfer complete [:x68k_hdc] SASI: No HD connected [:x68k_hdc] SASI: REQUEST SENSE [:x68k_hdc] REQUEST SENSE: read value 0x01 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] REQUEST SENSE: read value 0x00 [:x68k_hdc] SASI: Read transfer complete [:x68k_hdc] SASI: REZERO UNIT [:exp1:cz6bs1:mb89352] mb89352: SCTL: Reset and disable. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: BDID set to 0x07 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Bus free [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 00 [000000] [:exp1:cz6bs1:mb89352] mb89352: TCM: Write 00 [000000] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 00 [000000] [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: write 00 to register 05 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Bus free [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Bus free [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0x05 [:exp1:cz6bs1:mb89352] mb89352_r: BDID 0x80 [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: Write 80 to temporary register [:exp1:cz6bs1:mb89352] mb89352: TCM: Write c4 [00c400] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 09 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 03 [09c403] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x02 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Selection (SCSI ID0) [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:scsi:1:harddisk] T10SPC: TEST UNIT READY [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x03 [:exp1:cz6bs1:mb89352] Command executed: [:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: PCTL write 03 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5f [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: PCTL write 07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: BDID 0x80 [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: Write 81 to temporary register [:exp1:cz6bs1:mb89352] mb89352: TCM: Write c4 [09c403] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 09 [09c403] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 03 [09c403] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x02 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Selection (SCSI ID0) [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:scsi:1:harddisk] T10SPC: TEST UNIT READY [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x03 [:exp1:cz6bs1:mb89352] Command executed: [:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: PCTL write 03 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5f [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: PCTL write 07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: BDID 0x80 [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: Write 81 to temporary register [:exp1:cz6bs1:mb89352] mb89352: TCM: Write c4 [09c403] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 09 [09c403] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 03 [09c403] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x02 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Selection (SCSI ID0) [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 12 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 20 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: INQUIRY [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x01 [:exp1:cz6bs1:mb89352] Command executed: [:exp1:cz6bs1:mb89352] 12[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 20[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x59 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352: PCTL write 01 [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 20 [09c420] [:exp1:cz6bs1:mb89352] mb89352: TCM: Write 00 [090020] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 00 [000020] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: xfer data-in [:exp1:cz6bs1:mb89352] mb89352: SCMD: Start Transfer 01 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x05 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x02 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x45 E [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x41 A [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x47 G [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x41 A [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x54 T [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x45 E [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x54 T [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x32 2 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x32 2 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x35 5 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x03 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: PCTL write 03 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5f [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: PCTL write 07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: BDID 0x80 [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: Write 81 to temporary register [:exp1:cz6bs1:mb89352] mb89352: TCM: Write c4 [00c400] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 09 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 03 [09c403] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x02 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Selection (SCSI ID0) [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 25 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: READ CAPACITY [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x01 [:exp1:cz6bs1:mb89352] Command executed: [:exp1:cz6bs1:mb89352] 25[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x59 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352: PCTL write 01 [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 08 [09c408] [:exp1:cz6bs1:mb89352] mb89352: TCM: Write 00 [090008] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 00 [000008] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: xfer data-in [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: READ CAPACITY [:exp1:cz6bs1:mb89352] mb89352: SCMD: Start Transfer 01 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x18 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x49 I [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x02 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x03 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: PCTL write 03 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5f [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: PCTL write 07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: BDID 0x80 [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: Write 81 to temporary register [:exp1:cz6bs1:mb89352] mb89352: TCM: Write c4 [00c400] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 09 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 03 [09c403] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x02 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Selection (SCSI ID0) [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 08 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 01 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: READ at LBA 0 for 1 blocks [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x01 [:exp1:cz6bs1:mb89352] Command executed: [:exp1:cz6bs1:mb89352] 08[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 01[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x59 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352: PCTL write 01 [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 00 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCM: Write 02 [090200] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 00 [000200] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: xfer data-in [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: Reading 512 bytes from HD [:exp1:cz6bs1:mb89352] mb89352: SCMD: Start Transfer 01 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x58 X [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x36 6 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x38 8 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x49 I [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x31 1 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x02 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x24 $ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xa7 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x54 T [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x68 h [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x69 i [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x49 I [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2d - [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x55 U [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x49 I [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x54 T [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6d m [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x61 a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x74 t [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x69 i [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x27 ' [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x78 x [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x49 I [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x27 ' [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x63 c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x69 i [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6d m [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2e . [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x62 b [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x79 y [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x48 H [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x74 t [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2e . [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x28 ( [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2d - [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6c l [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x61 a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x62 b [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x29 ) [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x03 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: PCTL write 03 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5f [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: PCTL write 07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: BDID 0x80 [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: Write 81 to temporary register [:exp1:cz6bs1:mb89352] mb89352: TCM: Write c4 [00c400] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 09 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 03 [09c403] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x02 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Selection (SCSI ID0) [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 08 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 04 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 01 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: READ at LBA 4 for 1 blocks [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x01 [:exp1:cz6bs1:mb89352] Command executed: [:exp1:cz6bs1:mb89352] 08[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 04[:exp1:cz6bs1:mb89352] 01[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x59 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352: PCTL write 01 [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 00 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCM: Write 02 [090200] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 00 [000200] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: xfer data-in [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: Reading 512 bytes from HD [:exp1:cz6bs1:mb89352] mb89352: SCMD: Start Transfer 01 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x58 X [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x36 6 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x38 8 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4b K [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x24 $ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xa7 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x24 $ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xa7 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x24 $ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xa7 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x48 H [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x75 u [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6d m [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x61 a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6e n [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x36 6 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x38 8 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6b k [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x24 $ [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x87 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x03 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: PCTL write 03 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5f [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: PCTL write 07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352: PCTL write 00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: BDID 0x80 [:exp1:cz6bs1:mb89352] mb89352: SCTL: Arbitration enabled. [:exp1:cz6bs1:mb89352] mb89352: SCTL: Interrupts disabled. [:exp1:cz6bs1:mb89352] mb89352: Write 81 to temporary register [:exp1:cz6bs1:mb89352] mb89352: TCM: Write c4 [00c400] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 09 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 03 [09c403] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x02 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Selection (SCSI ID0) [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 28 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 40 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 01 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5a [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: PCTL write 02 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9a [:exp1:cz6bs1:mb89352] mb89352: Write 00 to temporary register [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: READ at LBA 40 for 1 blocks [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x01 [:exp1:cz6bs1:mb89352] Command executed: [:exp1:cz6bs1:mb89352] 28[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 40[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] 01[:exp1:cz6bs1:mb89352] 00[:exp1:cz6bs1:mb89352] [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x59 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x99 [:exp1:cz6bs1:mb89352] mb89352: PCTL write 01 [:exp1:cz6bs1:mb89352] mb89352: TCL: Write 00 [09c400] [:exp1:cz6bs1:mb89352] mb89352: TCM: Write 02 [090200] [:exp1:cz6bs1:mb89352] mb89352: TCH: Write 00 [000200] [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: xfer data-in [:exp1:cz6bs1:scsi:1:harddisk] T10SBC: Reading 512 bytes from HD [:exp1:cz6bs1:mb89352] mb89352: SCMD: Start Transfer 01 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x60 ` [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x24 $ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x48 H [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x74 t [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x56 V [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x31 1 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2e . [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x31 1 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x30 0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x04 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x02 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x04 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xf7 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x62 b [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x24 $ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x87 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xd8 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x30 0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x25 % [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x70 p [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xf5 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4a J [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xce [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2a * [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x29 ) [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x04 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xef [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x5d ] [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x40 @ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3a : [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xd9 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x14 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3a : [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xcb [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xc4 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xc0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x30 0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3a : [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xc6 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xd4 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x80 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xd4 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xba [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xcc [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x36 6 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3a : [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xbc [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x86 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfc [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2c , [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x02 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xdc [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x83 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe5 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x8a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xea [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xaa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe5 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x8b [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xea [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xab [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x70 p [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xf5 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x26 & [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4a J [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x80 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x8e [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x34 4 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3a : [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x9c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x41 A [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x9c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x30 0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3c < [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x12 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x31 1 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x82 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3c < [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xb2 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x30 0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x06 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x51 Q [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xc8 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xf0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x60 ` [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe9 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x51 Q [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xca [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe2 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x60 ` [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x82 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x34 4 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x29 ) [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x1a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x5a Z [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x55 U [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x42 B [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x80 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3a : [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xff [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x60 ` [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xc4 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xc0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xd4 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x86 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x76 v [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x01 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe5 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x8a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xea [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xaa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x70 p [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xf5 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x26 & [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4a J [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x80 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3c < [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x51 Q [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x48 H [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x55 U [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x3c < [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xa9 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x68 h [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x04 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x32 2 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x26 & [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x29 ) [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x0c [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xd6 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xa9 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xd6 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xbc [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x40 @ [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x8b [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe4 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x8b [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x52 R [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x83 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x22 " [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x7c | [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x67 g [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xc0 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe5 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x8b [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xea [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xab [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x70 p [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xf5 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x26 & [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4a J [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x80 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: SSTS 0xb0 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x04 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xe9 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x40 @ [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x21 ! [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x60 ` [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x04 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x27 ' [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x70 p [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x21 ! [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x43 C [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfa [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x34 4 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x70 p [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x21 ! [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4f O [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x60 ` [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0xfe [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x68 h [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x75 u [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6d m [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x61 a [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6e n [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x79 y [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x52 R [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x61 a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x64 d [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2e . [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x4e N [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x74 t [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x68 h [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x69 i [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6e n [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x67 g [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x79 y [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x74 t [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6d m [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x66 f [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x69 i [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6c l [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2e . [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x53 S [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6f o [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x72 r [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x74 t [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x20 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x70 p [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x6c l [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x61 a [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x73 s [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x65 e [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x2e . [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x03 [:exp1:cz6bs1:mb89352] mb89352_r: DREG 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x10 [:exp1:cz6bs1:mb89352] mb89352: Reset INTS status bits 10 [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: PCTL write 03 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9b [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x5f [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:exp1:cz6bs1:mb89352] mb89352_r: INTS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: PCTL write 07 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x9f [:exp1:cz6bs1:mb89352] mb89352: SCMD: Set REQ/ACK [:exp1:cz6bs1:mb89352] MB89352: phase set to 0x08 [:exp1:cz6bs1:mb89352] mb89352_r: PSNS 0x00 [:exp1:cz6bs1:mb89352] mb89352_r: TEMP 0x00 [:exp1:cz6bs1:mb89352] mb89352: SCMD: Reset REQ/ACK [:maincpu] ':maincpu' (FF8190): unmapped program memory write to E8C002 = 0101 & 00FF [:maincpu] ':maincpu' (02D486): unmapped program memory read from EAFC04 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0009 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 00C0 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0009 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0080 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0004 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0045 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0001 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0000 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0002 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 00B0 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0003 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 00C0 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0005 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 00E2 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0009 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0001 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 000B & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0056 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 000C & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 000E & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 000D & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0000 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 000E & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0002 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0003 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 00C1 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0005 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 00EA & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0000 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0080 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 000E & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0003 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 000F & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0000 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0000 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0010 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0000 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0010 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC04 = 0001 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC04 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0009 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0040 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0004 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0045 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0001 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0000 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0003 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 00C0 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0005 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0060 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 000B & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0056 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 000C & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 000E & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 000D & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0000 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 000E & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0002 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0003 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 00C1 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0005 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 00EA & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0000 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0080 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 000E & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0003 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 000F & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0000 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0000 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0000 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0001 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC00 = 0009 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC00 = 0009 & FFFF [:maincpu] ':maincpu' (02D50E): unmapped program memory write to EAFC08 = 0001 & FFFF [:maincpu] ':maincpu' (02CD84): unmapped program memory write to EAFC04 = 000E & FFFF [:maincpu] ':maincpu' (02CD94): unmapped program memory write to EAFC04 = 0002 & FFFF [:maincpu] ':maincpu' (02CDA4): unmapped program memory write to EAFC04 = 000C & FFFF [:maincpu] ':maincpu' (02CDB2): unmapped program memory write to EAFC04 = 0821 & FFFF [:maincpu] ':maincpu' (02CDB8): unmapped program memory write to EAFC04 = 000D & FFFF [:maincpu] ':maincpu' (02CDC6): unmapped program memory write to EAFC04 = 2108 & FFFF [:maincpu] ':maincpu' (02CDDE): unmapped program memory write to EAFC04 = 0004 & FFFF [:maincpu] ':maincpu' (02CDEC): unmapped program memory write to EAFC04 = 004C & FFFF [:maincpu] ':maincpu' (02CE2C): unmapped program memory write to EAFC04 = 0005 & FFFF [:maincpu] ':maincpu' (02CE3A): unmapped program memory write to EAFC04 = 008A & FFFF [:maincpu] ':maincpu' (02CE4C): unmapped program memory write to EAFC04 = 0003 & FFFF [:maincpu] ':maincpu' (02CE5A): unmapped program memory write to EAFC04 = 0000 & FFFF [:maincpu] ':maincpu' (02CE72): unmapped program memory write to EAFC04 = 0003 & FFFF [:maincpu] ':maincpu' (02CE80): unmapped program memory write to EAFC04 = 0001 & FFFF [:maincpu] ':maincpu' (02CE90): unmapped program memory write to EAFC04 = 000E & FFFF [:maincpu] ':maincpu' (02CEA0): unmapped program memory write to EAFC04 = 0003 & FFFF [:maincpu] ':maincpu' (02CD84): unmapped program memory write to EAFC00 = 000E & FFFF [:maincpu] ':maincpu' (02CD94): unmapped program memory write to EAFC00 = 0002 & FFFF [:maincpu] ':maincpu' (02CDA4): unmapped program memory write to EAFC00 = 000C & FFFF [:maincpu] ':maincpu' (02CDB2): unmapped program memory write to EAFC00 = 0821 & FFFF [:maincpu] ':maincpu' (02CDB8): unmapped program memory write to EAFC00 = 000D & FFFF [:maincpu] ':maincpu' (02CDC6): unmapped program memory write to EAFC00 = 2108 & FFFF [:maincpu] ':maincpu' (02CDDE): unmapped program memory write to EAFC00 = 0004 & FFFF [:maincpu] ':maincpu' (02CDEC): unmapped program memory write to EAFC00 = 004C & FFFF [:maincpu] ':maincpu' (02CE2C): unmapped program memory write to EAFC00 = 0005 & FFFF [:maincpu] ':maincpu' (02CE3A): unmapped program memory write to EAFC00 = 000A & FFFF [:maincpu] ':maincpu' (02CE4C): unmapped program memory write to EAFC00 = 0003 & FFFF [:maincpu] ':maincpu' (02CE5A): unmapped program memory write to EAFC00 = 0000 & FFFF [:maincpu] ':maincpu' (02CE72): unmapped program memory write to EAFC00 = 0003 & FFFF [:maincpu] ':maincpu' (02CE80): unmapped program memory write to EAFC00 = 0001 & FFFF [:maincpu] ':maincpu' (02CE90): unmapped program memory write to EAFC00 = 000E & FFFF [:maincpu] ':maincpu' (02CEA0): unmapped program memory write to EAFC00 = 0003 & FFFF [:maincpu] ':maincpu' (02D486): unmapped program memory read from EAFC14 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0009 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 00C0 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0009 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0080 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0004 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0045 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0001 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0000 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0002 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 00C0 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0003 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 00C0 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0005 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 00E2 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0009 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0001 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 000B & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0056 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 000C & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 000E & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 000D & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0000 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 000E & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0002 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0003 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 00C1 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0005 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 00EA & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0000 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0080 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 000E & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0003 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 000F & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0000 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0000 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0010 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0000 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0010 & FFFF [:maincpu] ':maincpu' (02D4D0): unmapped program memory write to EAFC14 = 0001 & FFFF [:maincpu] ':maincpu' (02D4DE): unmapped program memory write to EAFC14 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0009 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0040 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0004 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0045 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0001 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0000 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0003 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 00C0 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0005 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0060 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 000B & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0056 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 000C & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 000E & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 000D & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0000 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 000E & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0002 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0003 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 00C1 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0005 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 00EA & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0000 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0080 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 000E & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0003 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 000F & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0000 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0000 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0000 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0001 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0010 & FFFF [:maincpu] ':maincpu' (02D4F4): unmapped program memory write to EAFC10 = 0009 & FFFF [:maincpu] ':maincpu' (02D502): unmapped program memory write to EAFC10 = 0009 & FFFF [:maincpu] ':maincpu' (02D50E): unmapped program memory write to EAFC18 = 0001 & FFFF [:maincpu] ':maincpu' (02CD84): unmapped program memory write to EAFC14 = 000E & FFFF [:maincpu] ':maincpu' (02CD94): unmapped program memory write to EAFC14 = 0002 & FFFF [:maincpu] ':maincpu' (02CDA4): unmapped program memory write to EAFC14 = 000C & FFFF [:maincpu] ':maincpu' (02CDB2): unmapped program memory write to EAFC14 = 0821 & FFFF [:maincpu] ':maincpu' (02CDB8): unmapped program memory write to EAFC14 = 000D & FFFF [:maincpu] ':maincpu' (02CDC6): unmapped program memory write to EAFC14 = 2108 & FFFF [:maincpu] ':maincpu' (02CDDE): unmapped program memory write to EAFC14 = 0004 & FFFF [:maincpu] ':maincpu' (02CDEC): unmapped program memory write to EAFC14 = 004C & FFFF [:maincpu] ':maincpu' (02CE2C): unmapped program memory write to EAFC14 = 0005 & FFFF [:maincpu] ':maincpu' (02CE3A): unmapped program memory write to EAFC14 = 008A & FFFF [:maincpu] ':maincpu' (02CE4C): unmapped program memory write to EAFC14 = 0003 & FFFF [:maincpu] ':maincpu' (02CE5A): unmapped program memory write to EAFC14 = 0000 & FFFF [:maincpu] ':maincpu' (02CE72): unmapped program memory write to EAFC14 = 0003 & FFFF [:maincpu] ':maincpu' (02CE80): unmapped program memory write to EAFC14 = 0001 & FFFF [:maincpu] ':maincpu' (02CE90): unmapped program memory write to EAFC14 = 000E & FFFF [:maincpu] ':maincpu' (02CEA0): unmapped program memory write to EAFC14 = 0003 & FFFF [:maincpu] ':maincpu' (02CD84): unmapped program memory write to EAFC10 = 000E & FFFF [:maincpu] ':maincpu' (02CD94): unmapped program memory write to EAFC10 = 0002 & FFFF [:maincpu] ':maincpu' (02CDA4): unmapped program memory write to EAFC10 = 000C & FFFF [:maincpu] ':maincpu' (02CDB2): unmapped program memory write to EAFC10 = 0821 & FFFF [:maincpu] ':maincpu' (02CDB8): unmapped program memory write to EAFC10 = 000D & FFFF [:maincpu] ':maincpu' (02CDC6): unmapped program memory write to EAFC10 = 2108 & FFFF [:maincpu] ':maincpu' (02CDDE): unmapped program memory write to EAFC10 = 0004 & FFFF [:maincpu] ':maincpu' (02CDEC): unmapped program memory write to EAFC10 = 004C & FFFF [:maincpu] ':maincpu' (02CE2C): unmapped program memory write to EAFC10 = 0005 & FFFF [:maincpu] ':maincpu' (02CE3A): unmapped program memory write to EAFC10 = 000A & FFFF [:maincpu] ':maincpu' (02CE4C): unmapped program memory write to EAFC10 = 0003 & FFFF [:maincpu] ':maincpu' (02CE5A): unmapped program memory write to EAFC10 = 0000 & FFFF [:maincpu] ':maincpu' (02CE72): unmapped program memory write to EAFC10 = 0003 & FFFF [:maincpu] ':maincpu' (02CE80): unmapped program memory write to EAFC10 = 0001 & FFFF [:maincpu] ':maincpu' (02CE90): unmapped program memory write to EAFC10 = 000E & FFFF [:maincpu] ':maincpu' (02CEA0): unmapped program memory write to EAFC10 = 0003 & FFFF [:keyboard:x68k] KB: LED status set to 7f [:keyboard:x68k] KB: LED status set to 7f [:keyboard:x68k] KB: LED status set to 7f [:keyboard:x68k] KB: LED status set to 7f [:keyboard:x68k] KB: LED status set to 7f [:keyboard:x68k] KB: LED status set to 7f