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ID Category [?] Severity [?] Reproducibility Date Submitted Last Update
01688 Crash/Freeze Critical (emulation) Always Apr 8, 2008, 17:02 Dec 8, 2018, 02:55
Tester nicolasa View Status Public Platform
Assigned To AJR Resolution Fixed OS
Status [?] Resolved Driver segaxbd.cpp
Version 0.124u1 Fixed in Version 0.185 Build
Summary 01688: smgp, smgp5, smgp6, smgpu, smgpu1, smgpu2, smgpu3, smgpj: Memory Test causes a watchdog reset
Description Go to the service menu and start the memory test. After a short while, while the test is still running, the game is reset by the watchdog.
Steps To Reproduce
Additional Information
Flags
Regression Version 0.94u2
Affected Sets / Systems smgp, smgp5, smgp6, smgpu, smgpu1, smgpu2, smgpu3, smgpj
Attached Files
 
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Notes
4
User avatar
No.00620
Tafoid
Administrator
Apr 8, 2008, 17:31
edited on: Apr 8, 2008, 17:32
I posted about this about 6 months back but nothing was ever done.
http://www.mameworld.info/ubbthreads/showthreaded.php?Cat=&Board=mametesters&Number=128213

There were 2 U releases where work was documented to have been done on the driver: 0.94u2 (most likely when watchdog was set up) and 0.94u5. I suspect regression with one of those. I was only able to test 0.94 as working, 0.95 with the problem.

    0.94u2:
    segaxbd: tweaks
    - added hack to make GP Rider boot; input bug prevents full playability
    - fixed IRQ handling to match schematics
    - hooked up watchdog, sound reset, and global mute
    - hooked up dummy CPU for running SMGP communications
    - reduced interleave on all games except LOF

    0.94u5:
    segaxbd.c:
    * fixed missing sound in rachero/abcop
    * used explicit sync to get rid of high interleave on loffire
    * marked 317-0136.key bad until Nicola fixes it
    * marked loffire as working now that the divide chip is better
User avatar
No.02953
CharlesM
Developer
Nov 1, 2008, 03:11
edited on: Nov 1, 2008, 03:20
Watchdog details:

The MB3773 will assert reset 220ms after the last negative edge on its clock input. It asserts reset for 44ms. The clock input is controlled by two jumpers:

S35 shorted, S36 open : Clock input connected to /WDC.
S35 open, S36 shorted : Clock input connected to /GXINT.

The former is manual (68000 program must toggle PC6 (/WDC) of CXD1095 @ IC160), the latter is automatic (/GXINT asserted once per frame by tilemap chip).

Somebody with a SMGP board should confirm the jumper settings. If the watchdog timeout length is suspect, check the value of capacitor C51 near the MB3773. Schematics say it is 2.2uF.
User avatar
No.07243
Tafoid
Administrator
Feb 19, 2011, 22:25
Confirmed 0.94u2 breakage with freshly build binary
User avatar
No.15875
MetalGod
Senior Tester
Dec 8, 2018, 01:23
I've done some testing
It seems to be fixed since mame 0.185
Driver improvements on that version:
-segaxbd.cpp: Rewrote CXD1095 as a device and also add it to megaplay.cpp, megatech.cpp, cyclwarr, and bigfight. [AJR]