 No.23541
Robbbert Moderator
Jul 30, 2025, 00:35
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Seems to work ok. Perhaps you can give an example? |
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 No.23542
hap Developer
Jul 30, 2025, 09:08
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Unable to confirm either, on both 0.277 (the one you claim is the regression version) and also on current. Ball breaks the bricks. With either -nodrc or -drc. |
 No.23543
M.A.S.H. Senior Tester
Jul 30, 2025, 09:57
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Didn't test the 64bit version. Changed report to 32bit MAME version. Sorry for that!. |
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No.23545
hap Developer
Jul 30, 2025, 12:20
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Probably a regression with drcbex86.cpp then. Or, does the bug happen with -nodrc as well? |
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No.23549
M.A.S.H. Senior Tester
Aug 1, 2025, 01:20
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@hap The 32bit MAME version worked with mame poosho -nodrc Thx for the info! |
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No.23563
Robbbert Moderator
Aug 4, 2025, 08:35
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I've set it to confirmed, and Vas can decide what he wants to do about it. |
 No.23564
cuavas Administrator
Aug 4, 2025, 15:36
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It’s another case of something that was always broken in the i686 recompiler back-end but wasn’t obviously getting hit by any CPU cores before. Any 64-bit rotate on UML register I1 would nuke the low 32 bits of the result. |
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No.23565
M.A.S.H. Senior Tester
Aug 4, 2025, 16:46
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MAME 32-bit compiled and tested with “Poosho Poosho” – works. Thx hap and Vas! |
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No.23571
cuavas Administrator
Aug 7, 2025, 18:09
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I really shouldn’t have looked at drcbex86.cpp – there are so many cases where it doesn’t correctly clear the upper half of a register after a 32-bit load, but it also clears the upper half of “hot” registers excessively. Its be_parameter class needs to be reworked to fix this, and it needs to track additional state across instructions. Speaking of which, the way it tracks what memory values it’s got in temporary registers is horrible and needs to be completely changed, too. It’s a hot mess and almost not worth trying to fix. At least x86-64 and AArch64 are in better condition. |